Regviz

Microchip Technology /ATSAML22J18A /DMAC /QOSCTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as QOSCTRL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Microchip Technology/ATSAML22J18A/DMAC/QOSCTRL#0x0

7 43 0 0 00 0 0 0 0 0 0 0 0 (DISABLE)WRBQOS 0 (DISABLE)FQOS 0 (DISABLE)DQOS

DQOS=DISABLE, FQOS=DISABLE, WRBQOS=DISABLE

Description

QOS Control

Fields

WRBQOS

Write-Back Quality of Service

0 (DISABLE): Background (no sensitive operation)

1 (LOW): Sensitive Bandwidth

2 (MEDIUM): Sensitive Latency

3 (HIGH): Critical Latency
FQOS

Fetch Quality of Service

0 (DISABLE): Background (no sensitive operation)

1 (LOW): Sensitive Bandwidth

2 (MEDIUM): Sensitive Latency

3 (HIGH): Critical Latency
DQOS

Data Transfer Quality of Service

0 (DISABLE): Background (no sensitive operation)

1 (LOW): Sensitive Bandwidth

2 (MEDIUM): Sensitive Latency

3 (HIGH): Critical Latency

Links

()

Register License

Copyright © 2018 Microchip Technology Inc.

SPDX-License-Identifier: Apache-2.0

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data